Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
anselm
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Container registry
Model registry
Operate
Environments
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
vaclab
anselm
Commits
ab97c691
Commit
ab97c691
authored
6 years ago
by
wactbprot
Browse files
Options
Downloads
Patches
Plain Diff
error branch at worker.relay..
parent
da3d0391
Branches
Branches containing commit
No related tags found
No related merge requests found
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
anselm/worker.py
+7
-1
7 additions, 1 deletion
anselm/worker.py
with
7 additions
and
1 deletion
anselm/worker.py
+
7
−
1
View file @
ab97c691
...
@@ -44,6 +44,9 @@ class Worker(System):
...
@@ -44,6 +44,9 @@ class Worker(System):
self
.
log
.
error
(
"
member var: work_on_line not set
"
)
self
.
log
.
error
(
"
member var: work_on_line not set
"
)
def
relay_worker
(
self
,
task
,
line
):
def
relay_worker
(
self
,
task
,
line
):
# wait for bus relaxation:
time
.
sleep
(
1
)
ok
=
False
ok
=
False
req
=
requests
.
post
(
self
.
relay_url
,
data
=
json
.
dumps
(
task
),
headers
=
self
.
headers
)
req
=
requests
.
post
(
self
.
relay_url
,
data
=
json
.
dumps
(
task
),
headers
=
self
.
headers
)
res
=
req
.
json
()
res
=
req
.
json
()
...
@@ -62,9 +65,12 @@ class Worker(System):
...
@@ -62,9 +65,12 @@ class Worker(System):
if
'
error
'
in
res
:
if
'
error
'
in
res
:
self
.
aset
(
'
error
'
,
line
,
res
,
expire
=
False
)
self
.
aset
(
'
error
'
,
line
,
res
,
expire
=
False
)
self
.
log
.
error
(
"
re
ceive error
"
)
self
.
log
.
error
(
re
s
)
self
.
r
.
publish
(
'
error
'
,
line
)
self
.
r
.
publish
(
'
error
'
,
line
)
ok
=
False
ok
=
False
# wait for bus relaxation:
time
.
sleep
(
1
)
if
ok
:
if
ok
:
self
.
log
.
debug
(
"
values written
"
)
self
.
log
.
debug
(
"
values written
"
)
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment